![]() * Separate power planes for cores and memory controller, for optimum power consumption and performance, creating more opportunities for power savings within the cores and memory controller.Advanced System Optimizer. * Enables more granular power management capabilities to reduce processor energy consumption. O BENEFIT: Helps users get more efficient performance by dynamically activating or turning off parts of the processor. * Power can be switched on or off within a single clock cycle, saving energy without comprimised performance. ![]() * Works automatically without the need for drivers or BIOS enablement. For example, the memory controller can turn off the write logic when reading from memory, helping reduce system power. * Reduces processor energy consumption by turning off unused parts of the processor. ![]() O BENEFIT : Enables platform designs providing less heat and noise efficient performance and energy usage. * For quieter operation and reduced power requirements * Enhanced power management features which automatically and instantaneously adjusts performance states and features based on processor performance requirements O BENEFIT : Helps virtualization software to run more securely and efficiently enabling a better experience when dealing with virtual systems * Silicon feature-set enhancements designed to improve the performance, reliability, and security of existing and future virtualization environments by allowing virtualized applications with direct and rapid access to their allocated memory. O BENEFIT : Quick access to system memory for better performance.ĪMD Virtualization™ (AMD-V™) With Rapid Virtualization Indexing * A high-bandwidth, low-latency integrated DDR2 memory controller Integrated DDR2 DRAM Controller with AMD Memory Optimizer Technology O BENEFIT : Quick access times to system resources for better performance. * Up to 27.2GB/s total delivered processor-to-system bandwidth (HyperTransport bus + memory bus) 0 GB/s HyperTransport™ I/O bandwidth Up to 14.4GB/s in HyperTransport Generation 3.0 mode O BENEFIT : Larger data paths for quicker floating point calculations and better performance. ![]() * High performance (128bit internal data path) floating point unit per core. O BENEFIT : Shortened access times to highly accessed data for better performance. * In addition to the 512K L2 cache per core, up to 2MB of 元 cache shared by up to 4 cores. O Up to 27.2GB/s total delivered processor-to-system bandwidth (HyperTransport bus + memory bus) ![]() O HyperTransport™ Technology provides up to 14.4GB/s peak bandwidth per processor-reducing I/O bottlenecks O Scales memory bandwidth and performance to match compute needs O Increases application performance by reducing memory latency * Designed to enable simultaneous 32- and 64-bit computing * Helps improve system performance and efficiency by directly connecting the memory controller and I/O to the CPU. O BENEFIT : Cores can communicate on die rather than on package for better performance * True quad-core designed from the ground up for better communication between cores. The industry's first true Quad core x86 processor ![]()
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